1. Field of the Invention
The present application relates generally to fabricating integrated circuits (ICs) on semiconductor wafers using a semiconductor fabrication process, and more particularly to transforming yield information of the semiconductor fabrication process.
2. Related Art
Integrated circuits (ICs) are formed on a semiconductor wafer using a semiconductor fabrication process. Typically a set of wafers, called a lot, are stacked and processed together during mass fabrication of ICs. A lot of wafers may be placed in a cassette and processed together using the same fabrication process. Once a lot of wafers are completely processed, they are cut into individual chips also called dice.
During mass manufacture of ICs, defects may exist in some of the ICs produced. For example, variations can be introduced during the fabrication process that adversely affects specific locations on a wafer. If these variations are too far from specified tolerances, an IC may not function properly when tested. Some ICs may be repairable while others may not be. If after testing and repair these ICs are unusable, the ICs may be labeled defective and discarded.
Typically, semiconductor manufacturers obtain and analyze yield information. However, manufacturers may not always have the expertise or may not have the time to analyze yield information for improving the fabrication process. An outside party/company may have the ability to analyze the yield information; however, manufacturers are reluctant to release their yield information to outside parties/companies. As a result, semiconductor companies do not typically publish their yield information (i.e., make their yield information available to outside parties/companies).